An
article on PCI Express
BY HARISH. K
Brindavan
College of Engineering Bangalore
Department of Electronics &
Communication Engg
PCI Express (Peripheral Component Interconnect Express),
officially abbreviated as PCIe, is a high-speed serial computer
expansion bus
standard designed to replace the older PCI,
PCI-X,
and AGP bus standards. PCIe has numerous
improvements over the aforementioned bus standards, including higher maximum
system bus throughput, lower I/O pin count and smaller physical footprint,
better performance-scaling for bus devices, a more detailed error detection and
reporting mechanism (Advanced Error Reporting, and native hot-plug
functionality. More recent revisions of the PCIe standard support hardware I/O
virtualization.
The PCIe electrical interface is also used
in a variety of other standards, most notably Express Card,
a laptop
expansion card interface. A lane is composed of two differential signaling pairs: one pair for
receiving data, the other for transmitting. Thus, each lane is composed of four
wires or signal traces. Conceptually, each lane is used
as a full-duplex byte stream,
transporting data packets in eight-bit 'byte' format, between endpoints of a
link, in both directions simultaneously. Physical PCIe slots may contain from
one to thirty-two lanes, in powers of two (1, 2, 4, 8, 16 and 32). Lane counts
are written with an × prefix (e.g., ×16 represents a sixteen-lane
card or slot), with ×16 being the largest size in common use. PCI Express
operates in consumer, server, and industrial applications, as a
motherboard-level interconnect (to link motherboard-mounted peripherals), a
passive back plane interconnect and as an expansion
card interface for add-in boards. In virtually all modern (as of
2012) PCs, from consumer laptops and desktops to enterprise data servers, the
PCIe bus serves as the primary motherboard-level interconnect, connecting the
host system-processor with both integrated-peripherals (surface-mounted ICs)
and add-on peripherals (expansion cards). In most of these systems, the PCIe
bus co-exists with one or more legacy PCI buses, for backward compatibility
with the large body of legacy PCI peripherals.
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